Awarded to L-3 Communications ASA Limited

Start date: Monday 9 August 2021
Value: £208,156.03
Company size: SME
Defence Science and Technology Laboratory

OpenCPI Development Accelerator

4 Incomplete applications

1 SME, 3 large

5 Completed applications

1 SME, 4 large

Important dates

Tuesday 15 June 2021
Deadline for asking questions
Tuesday 22 June 2021 at 11:59pm GMT
Closing date for applications
Tuesday 29 June 2021 at 11:59pm GMT


Off-payroll (IR35) determination
Contracted out service: the off-payroll rules do not apply
Summary of the work
Development of OpenCPI components for FPGA and CPU based platforms. The task will involve writing C and VHDL based components as defined by the open source OpenCPI Git Lab with the associated defined documentation set.
Latest start date
Friday 30 July 2021
Expected contract length
2 years from start date
No specific location, for example they can work remotely
Organisation the work is for
Defence Science and Technology Laboratory
Budget range
The initial SOW has a budget of 300k.

Dstl anticipate that further funding will be available up to a maximum of £3M GBP for the duration of the 2 year contract. This does not include the contingency budget of up-to 20% extra if required.

About the work

Why the work is being done
The UK Ministry of Defence continues to research new and novel technologies. OpenCPI (Open Component Portability Infrastructure) is a new software framework that is growing in popularity among the digital signal processing community. Dstl is keen to develop tools to further the understanding through experimentation to establish how OpenCPI can be leveraged to support military technologies and communications
Problem to be solved
To establish a team able to produce an FPGA and CPU implementation of specific list of Digital Signal Processing elements to support experimentation. The components to be made are mathematical functions commonly found in other digital signal processing applications; from basic adders to Fast Fourier Transforms (FFT) in both C/C++ and VHDL/Verilog. The OpenCPI framework also provides testing of components and is completed using python wrappers.
Who the users are and what they need to do
As a user of the OpenCPI components. I want to be able to access a FPGA and CPU version of each mathematical function detailed in the backlog. I want to be able to immediately integrate the component with other elements which is possible because the components are built to the standards specified on the open source OpenCPI Git Lab. A standardised documentation set should be delivered with each component as per the guidance provided from the open source OpenCPI Git Lab. OpenCPI documentation is available
Early market engagement
Any work that’s already been done
Dstl has conducted work on the OpenCPI framework and has experience in building components for OpenCPI. is the component library of interest.
Existing team
The supplier will be working with a dedicated technical partner from Dstl for day to day interaction, alongside this there will be a small established team of FPGA and Software developers with Digital Signal Processing and Communications experience.
Current phase
Not started

Work setup

Address where the work will take place
Dstl expects that the majority of the work to be conducted at the supplier own address, but there may be times when both formal meetings will take place at Dstl Porton Down, Salisbury, SP4 0JQ.
Working arrangements
The supplier shall utilise Agile development approach. This will allow development to closely align with requirements and assist evaluation throughout the project. The supplier shall host an initial kick off meeting with the Dstl Technical Partner and team. The supplier will need more frequent interaction with Dstl Technical partner during set up phase. Dstl will assist in the configuration of a development environment. The supplier shall enable the remote development environment can be accessed by the technical partner at OFFICIAL. Dstl will provide an initial 1 week of training (not necessarily consecutive days). Dstl requires a check-in once a month.
Security clearance
Must be able to handle OFFICIAL material only.

Additional information

Additional terms and conditions

Skills and experience

Buyers will use the essential and nice-to-have skills and experience to help them evaluate suppliers’ technical competence.

Essential skills and experience
  • Provide a summary of the company ethos and link to company website of relevant department or projects where applicable.
  • Demonstrate with evidence the ability to deliver without authority funded capability enhancements (for example, procurement of additional ICT to support development activities).
  • Demonstrate with evidence the ability to conduct agile software development in-house, without support from subcontractors.
  • Demonstrate with evidence the ability to continue and evolve software development from a complex inherited codebase like OpenCPI.
  • Demonstrate with evidence experience developing and implementing software in C / C++ for embedded real time operating systems.
  • Demonstrate with evidence experience of developing and implementing VHDL / Verilog designs for real time signal processing applications.
  • Demonstrate with evidence experience of languages Python and Bash for scripting purposes.
  • Demonstrate with evidence experience and working knowledge of Docker and Jira.
  • Demonstrate with evidence the ability to produce appropriate levels of documentation, and conduct verification and validation of software.
  • Demonstrate with evidence experience using the Git Source Code Management (SCM) system and broader collaborative development tool suites.
  • Demonstrate with evidence of how you have provided customers with access to developmental and release versions of software source code, backlog, and engaged them in the development process.
  • Supplier must be able to work with a cyber risk level of “Very Low”. Reference:
Nice-to-have skills and experience
  • UK security clearance
  • TickIT plus accreditation
  • Knowledge of digital signal processing for radio frequency communications
  • OpenCPI knowledge

How suppliers will be evaluated

All suppliers will be asked to provide a written proposal.

How many suppliers to evaluate
Proposal criteria
  • Make an OpenCPI component that reverses bit order of input where; input 0b01101010 would output 0b01010110. Provide a link to code for assessment. RCC and HDL implementations are encouraged. (0.3)
  • Demonstrate with evidence experience of developing and implementing software applications and firmware designs using modern digital signal processing techniques for radio communications. (0.2)
  • Provide a breakdown of the team structure and team members CVs to provide examples of their personal career experience for suitability. (0.2)
  • Demonstrate knowledge of cloud infrastructure deployments to enable remote access to working environment via a browser. (0.1)
  • Demonstrate with evidence ability to follow industry best practice when conducting software development (for example TickIT plus including ISO/IEC 12207) specifically concentrating on Verification and Validation processes. (0.05)
  • Provide estimated timeframes for the work (include Gantt chart with approximate sprint timeframes) Suggested 2 weeks sprints with optional weekly catchups. Alternatives will be considered. (0.05)
  • Consider and explain identified risks and dependencies. Provide details of offered approaches to manage these risks (include a Risk Register). (0.05)
Cultural fit criteria
  • Demonstrate consistent cultural commitment to agile software development practices. (0.5)
  • Demonstrate with evidence the ability to respond to an evolving customer requirement. (0.2)
  • Demonstrate with evidence of sharing knowledge and experience with other team members. (0.2)
  • Demonstrate with evidence being transparent and collaborative when making decisions. (0.1)
Payment approach
Capped time and materials
Additional assessment methods
Evaluation weighting

Technical competence


Cultural fit




Questions asked by suppliers

1. • The requirement states “Provide estimated timeframes for the work (include Gantt chart with approximate sprint timeframes) Suggested 2 weeks sprints with optional weekly catchups. Alternatives will be considered. (0.05)”. It is our understanding that the work draw from a backlog using a capped T&M model. Without visibility of the prioritised tasks from this backlog we are unable to provide timeframes for the work or total cost. Are you intending to share a prioritised backlog or are you expecting an estimated price per sprint based on our assumption about team composition?
1. It is anticipated that the supplier would provide a team composition, which would allow the supplier to calculate timeframes and cost e.g. “ We would be able to allocate 3 engineers full time for the project, therefore, this would cost: £X per sprint, therefore, £Y for the project.” Part of the selection process is assessing the size and quality of their development team
2. The deadline for this tender is short considering the requirement to submit code as part of the proposal. Would you be willing to provide a 2 week extension to the submission deadline?
The code snippets are assessed as basic, and are deemed appropriate for the timescale set for the response. We reserve the right to decline an extension request.